| Display title | SystemVerilog |
| Default sort key | Systemverilog |
| Page length (in bytes) | 35,225 |
| Namespace ID | 0 |
| Page ID | 2540686 |
| Page content language | en - English |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of page watchers | 69 |
| Number of page watchers who visited in the last 30 days | 4 |
| Number of redirects to this page | 4 |
| Counted as a content page | Yes |
| Wikidata item ID | Q1387402 |
| Local description | Hardware description and hardware verification language |
| Central description | hardware description and hardware verification language |
| Page views in the past 30 days | |
| Edit | Allow all users (no expiry set) |
| Move | Allow all users (no expiry set) |
| Page creator | 216.58.29.129 (talk) |
| Date of page creation | 01:22, 26 August 2005 |
| Latest editor | Rkieferbaum (talk | contribs) |
| Date of latest edit | 23:49, 13 May 2025 |
| Total number of edits | 425 |
| Recent number of edits (within past 30 days) | 1 |
| Recent number of distinct authors | 1 |
| Hidden categories (11) | This page is a member of 11 hidden categories (help):
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| Transcluded templates (96) | Pages transcluded onto the current version of this page (help):
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| Wikidata entities used in this page | - SystemVerilog
- Sitelink
- Title
- Description: en
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| Background color inline style rule exists without a corresponding text color | 1 |
