Memory management unit: Revision history

8 May 2025

• curprev 18:5018:50, 8 May 2025 K1767 talk contribs 49,937 bytes +6 →Burroughs B5000 series, B6x00/B7x00/B5900/A-series/Unisys MCP systems: Try to make the text a bit clearer. undo
• curprev 18:3818:38, 8 May 2025 K1767 talk contribs 49,931 bytes +5 →x86: Try to make a phrase a bit clearer. undo
• curprev 18:1518:15, 8 May 2025 K1767 talk contribs 49,926 bytes −1 →DEC Alpha: Fix a typing mistake. undo
• curprev 17:5917:59, 8 May 2025 K1767 talk contribs 49,927 bytes −5 →IOMMUs: Delete an unnecessary word. undo
• curprev 17:2017:20, 8 May 2025 K1767 talk contribs 49,932 bytes +1 →Paged translation: Try to fix a grammar error. undo
• curprev 16:5816:58, 8 May 2025 K1767 talk contribs 49,931 bytes −10 Try to make some text clearer. undo

5 May 2025

• curprev 17:5517:55, 5 May 2025 Guy Harris talk contribs 49,941 bytes −4 →Paged translation: Not just early 1980s. undo
• curprev 04:3704:37, 5 May 2025 Guy Harris talk contribs 49,945 bytes 0 →Benefits: De-hypenate "N bits". undo
• curprev 04:3504:35, 5 May 2025 Guy Harris talk contribs 49,945 bytes −28 Put the bank switching stuff in a section of its own - it's different from segmentation and it's different from paging. undo
• curprev 03:0003:00, 5 May 2025 Guy Harris talk contribs 49,973 bytes +128 →Paged translation: Give more examples of paged MMUs from that era. (Technically, the i386's on-chip MMU is a weird form of segmentation+paging - the segments reside within a paged linear address space rather than each segment having a page table - so we'll mention it there.) undo
• curprev 02:4802:48, 5 May 2025 Guy Harris talk contribs 49,845 bytes −19 Put the bit about expanding the physical address space beyond the size of the virtual address space in the "Benefits" section. Remove the redundant "of an MMU" from the section title. undo
• curprev 02:4502:45, 5 May 2025 Guy Harris talk contribs 49,864 bytes +370 →Paged translation: Fix up the bit about "the page tables get bigger as the address space gets bigger", and mention that, gif the address space is sparse, which it probably is for a lot of code, you can handle the problem with a multi-level page table (which even works for a static-RAM map; see the Sun MMU). undo
• curprev 00:2600:26, 5 May 2025 Guy Harris talk contribs 49,494 bytes +25 →Segmented translation: Give the Zilog Z8010 as a segmented MMU. undo
• curprev 00:2600:26, 5 May 2025 Guy Harris talk contribs 49,469 bytes 0 →Paged translation: The Zilog Z8010 was segmented. The *Z8015* was paged. undo
• curprev 00:2100:21, 5 May 2025 Guy Harris talk contribs 49,469 bytes −54 Put the section on benefits at the top level, and rewrite the section on protection. Put the MMU image at the top, as it now pertains to the "separate MMU chip vs. integrated MMU" paragraph in the lead. undo
• curprev 00:1600:16, 5 May 2025 Guy Harris talk contribs 49,523 bytes 0 The bit about separate vs. integrated MMUs in microprocessor sounds more like a general-interest item for the lead. Put it there. undo
• curprev 00:1400:14, 5 May 2025 Guy Harris talk contribs 49,523 bytes +1 →Types of address translation: Move the bit about external vs. internal fragmentation to the section on paged translation. Link the first occurrence of external fragmentation, in the section on segmented translation. undo

4 May 2025

• curprev 23:4423:44, 4 May 2025 Guy Harris talk contribs 49,522 bytes +17 →Segmentation plus paging: Link "68070" to Philips 68070. undo
• curprev 23:4123:41, 4 May 2025 Guy Harris talk contribs 49,505 bytes +61 Put the non-memory-mapping related functions into a separate section, rather than the lede; those are secondary functions, and are often provided by *other* components instead. Use the Signetics 68905 manual as a reference. undo
• curprev 23:3423:34, 4 May 2025 Guy Harris talk contribs 49,444 bytes −8 Mention the 68905 as an example of an MMU with a cache controller, and just say *some* MMUs did; *most* is a bit strong. It's now discussed in the "segmentation plus paging" section - remove it from the "paging" section. undo
• curprev 23:2823:28, 4 May 2025 Guy Harris talk contribs 49,452 bytes +396 →Types of address translation: The Signetics 68905 supported segmentation and paging, not just segmentation. undo
• curprev 13:2413:24, 4 May 2025 Arjayay talk contribs m 49,056 bytes −4 Duplicate word removed undo
• curprev 06:0606:06, 4 May 2025 Guy Harris talk contribs 49,060 bytes −774 →Segmented translation: The PDP-11 MMU is more like segmentation than paging. undo

3 May 2025

• curprev 07:5907:59, 3 May 2025 Guy Harris talk contribs 49,834 bytes +16 →Paged translation: De-hyphenate "64-bits" ("64-bit", as an adjective, is hyphenated; "64 bits", as a coined number of bits, isn't, in English). Mention additional pages of the Spectra 70 model 70/46 manual that are about address translation. Fix title - it's 70/46, not 70-46, and it's the *Processor Reference Manual*, not the Processor Manual. undo
• curprev 07:4807:48, 3 May 2025 Guy Harris talk contribs 49,818 bytes 0 →Paged translation: Fix autoincorrection from a typo that resulted in a different typo. undo
• curprev 07:4707:47, 3 May 2025 Guy Harris talk contribs 49,818 bytes −711 →Paged translation: Speak in general terms, rather than specifically discussing a particular type of MMU for a Motorola 68000. Move some stuff around and remove redundancy. undo
• curprev 07:3607:36, 3 May 2025 Guy Harris talk contribs 50,529 bytes −613 MMUs with protection bits are only "modern" if you consider the mid-to-late 1960s and the 1970s to be "modern times". Get rid of the "paged translation" vs. "demand paging" stuff, which doesn't reflect reality (or, at least, pre-early-Motorola-68000-MMU reality) well. (Leave the bank-switching stuff; that needs to be treated better if relevant or removed if not.) undo
• curprev 06:3406:34, 3 May 2025 Guy Harris talk contribs 51,142 bytes +8 There is no guarantee that virtual addresses are placed on the memory bus; some older microprocessor CPUs that didn't have on-chip MMUs may have put addresses on the CPU's memory bus, with the MMU attached to the address lines of the CPU's memory bus translating those addresses and putting them on the address lines of the bus to which memory is connected, but not all CPUs (microprocessor or not) worked that way, and modern CPUs have the MMU as part of the CPU. undo
• curprev 02:4302:43, 3 May 2025 Guy Harris talk contribs 51,134 bytes −23 →Paged translation: The program does *not* see its memory as a single contiguous block in the segmented case; it sees it as a set of segments, each of which is a *separate* contiguous block. Fix grammar while we're at it. undo
• curprev 02:4202:42, 3 May 2025 Guy Harris talk contribs 51,157 bytes −2 →Paged translation: Say "to store a set of mapping information" so that the "that holds a set of..." doesn't run the risk of looking as if it applies only to the last entry in the list of non-page-table MMUs. undo
• curprev 02:4002:40, 3 May 2025 Guy Harris talk contribs 51,159 bytes +9 →Paged translation: Speak of a set of registers for a translation-register MMU. undo
• curprev 02:3902:39, 3 May 2025 Guy Harris talk contribs 51,150 bytes +29 →Paged translation: Refer to the static RAM as a one-or-more-level array; the Zehr paper's "paged translation" used a single-level array, which has the same problem as a single-level in-memory page table, namely that the array of page table entries can't be sparse and it gets difficult to handle a large address space. Sun's static-RAM MMUs were multi-level. (And, yes, you can do demand paging with a static-RAM MMU.) undo
• curprev 01:5701:57, 3 May 2025 Guy Harris talk contribs 51,121 bytes +14 Discuss IOMMUs in their own section. undo
• curprev 01:5501:55, 3 May 2025 Guy Harris talk contribs 51,107 bytes −497 →Paged translation: Some reshuffling and removal of duplicate information. undo
• curprev 01:5001:50, 3 May 2025 Guy Harris talk contribs 51,604 bytes −20 Put the "modern systems" stuff into the "paged translation" section, as they're discussing the same topic. The next step is to remove redundancy. undo
• curprev 01:4201:42, 3 May 2025 Guy Harris talk contribs 51,624 bytes −21 →Segmented translation: Start out with a description of how segmentation works; link "segment" to memory segmentation, which gives more details. Take text from memory segmentation#x86 architecture to describe the 8086/8088/80186/80188 flavor of segmentation, and note that the 80286 and later had a more normal flavor, with a segment table. Comment out the PDP-11 stuff for now. Remove stuff about Mac non-MMU schemes. undo
• curprev 00:0500:05, 3 May 2025 Guy Harris talk contribs 51,645 bytes 0 →Types of address translation: Put paged translation before segmentation plus paging. (The section on paged will be fixed not to claim it differs from what is used now.) undo
• curprev 00:0300:03, 3 May 2025 Guy Harris talk contribs 51,645 bytes +10 →Historical systems: Use this section to describe the different types of translation, including paged (the description of which will cover modern paged translation). undo

2 May 2025

• curprev 23:5523:55, 2 May 2025 Guy Harris talk contribs 51,635 bytes −71 Start out with a history section, mentioning segmentation, segmentation+paging, and paging. This needs a lot more work to get rid of the notion of "paged translation" and "paging"/"demand paging"/whatever being two different things. (No, the 68000-systems reference isn't correct; they *aren't* different things. The author's a hardware engineer, and doesn't seem to be familiar with Sun's 68k-based pre-68030 systems, so maybe he doesn't get what "demand paging" is about.) undo
• curprev 23:3423:34, 2 May 2025 Guy Harris talk contribs 51,706 bytes +208 Use the Wayback Machine for a now-dead link. undo

30 April 2025

• curprev 19:5319:53, 30 April 2025 DavidCary talk contribs 51,498 bytes +563 mention IOMMU and link to related articles, etc. undo

22 April 2025

• curprev 00:2300:23, 22 April 2025 Tule-hog talk contribs 50,935 bytes +7 →ARM: add acronym undo

12 April 2025

• curprev 16:0516:05, 12 April 2025 Kvng talk contribs 50,928 bytes −10 Reverted good faith edits by Jncraton (talk): Unnec edit, works fine either way undo Tags: Twinkle Undo

9 April 2025

• curprev 17:3317:33, 9 April 2025 Jncraton talk contribs 50,938 bytes +10 →Segmented translation: Correct non-breaking spaces undo Tags: Reverted 2017 wikitext editor

5 April 2025

• curprev 13:2613:26, 5 April 2025 Kvng talk contribs 50,928 bytes −14 ce new contribution undo

2 April 2025

• curprev 12:0112:01, 2 April 2025 Maury Markowitz talk contribs m 50,942 bytes +49 →Paged translation undo Tag: 2017 wikitext editor
• curprev 11:3511:35, 2 April 2025 Maury Markowitz talk contribs 50,893 bytes +1,037 →Segmented translation undo Tag: 2017 wikitext editor

6 January 2025

• curprev 07:0007:00, 6 January 2025 Guy Harris talk contribs 49,856 bytes +277 →x86: Mention both 48-bit and 57-bit linear addresses. undo

5 January 2025

• curprev 22:1922:19, 5 January 2025 Guy Harris talk contribs 49,579 bytes 0 →x86: Move the bit about the NX bit being present in x86-64 from the beginning up to the first paragraph about x86-64. undo
• curprev 22:1722:17, 5 January 2025 Guy Harris talk contribs 49,579 bytes +939 →x86: Describe how segmentation works in the no-MMU processors, the 80286 in protected mode, and subsequent processors in protected+paging mode. Mention Intel 5-level paging. undo