Jump to content

Macrocell array

From Wikipedia, the free encyclopedia
This is an old revision of this page, as edited by 117.199.26.110 (talk) at 12:28, 15 September 2012. The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

A macrocell array is an approach to the design and manufacture of ASICs. Essentially, it is a small step up from the otherwise similar gate array, but rather than being a prefabricated array of simple logic gates, the macrocell array is a prefabricated array of higher-level logic functions such as flip-flops, ALU functions, registers, and the like. These logic functions are simply placed at regular predefined positions and manufactured on a wafer (electronics)er, usually called master slice. Creation of a circuit with a specified function is accomplished by adding metal interconnects to the chips on the master slice late in the manufacturing process, allowing the function of the chip to be customised as desired.