https://de.wikipedia.org/w/index.php?action=history&feed=atom&title=Graphics_Double_Data_Rate
Graphics Double Data Rate - Versionsgeschichte
2025-06-04T21:48:36Z
Versionsgeschichte dieser Seite in Wikipedia
MediaWiki 1.45.0-wmf.3
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=255440543&oldid=prev
Aka: Tippfehler entfernt, Kleinkram
2025-04-24T18:52:28Z
<p><a href="/wiki/Benutzer:Aka/Tippfehler_entfernt" title="Benutzer:Aka/Tippfehler entfernt">Tippfehler entfernt</a>, Kleinkram</p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 24. April 2025, 20:52 Uhr</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR6X ===</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR6X ===</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Wechselt von NRZ-PAM2- zu NRZ-PAM4-Modulation. Erstmalige Verwendung bei der Nvidia RTX 3080 und 3090.<ref>{{Internetquelle |autor= Ryan Smith |titel= Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA’s RTX 3090 |url= https://www.anandtech.com/show/15978/micron-spills-on-gddr6x-pam4-signaling-for-higher-rates-coming-to-nvidias-rtx-3090 |datum= 2020-08-20 |abruf = 2022-11-05}}</ref><del style="font-weight: bold; text-decoration: none;"> </del></div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Wechselt von NRZ-PAM2- zu NRZ-PAM4-Modulation. Erstmalige Verwendung bei der Nvidia RTX 3080 und 3090.<ref>{{Internetquelle |autor= Ryan Smith |titel= Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA’s RTX 3090 |url= https://www.anandtech.com/show/15978/micron-spills-on-gddr6x-pam4-signaling-for-higher-rates-coming-to-nvidias-rtx-3090 |datum= 2020-08-20 |abruf = 2022-11-05}}</ref></div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Informationen zu GDDR7 wurden im Oktober 2022 vorgestellt. Erstmaligige <del style="font-weight: bold; text-decoration: none;">Verwedung</del> in den NVIDIA RTX 5090 und 5080 Grafikkarten. Desktop-GPUs der RTX-50-Serie verwenden GDDR7-Module von Samsung, da diese früher zur Validierung verfügbar waren als Module von SK Hynix und Micron.</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Informationen zu GDDR7 wurden im Oktober 2022 vorgestellt. Erstmaligige <ins style="font-weight: bold; text-decoration: none;">Verwendung</ins> in den NVIDIA RTX 5090 und 5080 Grafikkarten. Desktop-GPUs der RTX-50-Serie verwenden GDDR7-Module von Samsung, da diese früher zur Validierung verfügbar waren als Module von SK Hynix und Micron.</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><references group="videocardz.com/newz/nvidia-reportedly-prioritizes-samsung-gddr7-memory-for-desktop-geforce-rtx-50-series aufgerufen am 19.3.2025 (US-Englisch)" responsive="" /></div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div><references group="videocardz.com/newz/nvidia-reportedly-prioritizes-samsung-gddr7-memory-for-desktop-geforce-rtx-50-series aufgerufen am 19.3.2025 (US-Englisch)" responsive="" /></div></td>
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Aka
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=254332115&oldid=prev
Denniss: /* (G)DDR2 */
2025-03-19T00:33:19Z
<p><span class="autocomment">(G)DDR2</span></p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Nächstältere Version</td>
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 19. März 2025, 02:33 Uhr</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Folgende GDDR-Typen wurden bisher entwickelt:</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Folgende GDDR-Typen wurden bisher entwickelt:</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>=== (G)<del style="font-weight: bold; text-decoration: none;">DDR2</del> ===</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>=== (G)<ins style="font-weight: bold; text-decoration: none;">DDR</ins> ===</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>GDDR basiert auf Speicherbausteinen nach [[DDR-SDRAM]]-Standard. Bei dieser ersten Generation liegt die Spannung von [[Spannungsbezeichnung|VDD]] und [[Spannungsbezeichnung|VDDQ]] bei 2,5&nbsp;V. Mit Taktraten von 166 bis 400&nbsp;MHz und Lese-Latenzen von 3, 4 und 5 Taktzyklen wird ein maximaler Datendurchsatz von 25,6&nbsp;GB/s bei 256-Bit-Anbindung erreicht. GDDR arbeitet wie der DDR-SDRAM mit einem Zweifach-[[Dynamic Random Access Memory#Prefetch|Prefetch]].</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>GDDR basiert auf Speicherbausteinen nach [[DDR-SDRAM]]-Standard. Bei dieser ersten Generation liegt die Spannung von [[Spannungsbezeichnung|VDD]] und [[Spannungsbezeichnung|VDDQ]] bei 2,5&nbsp;V. Mit Taktraten von 166 bis 400&nbsp;MHz und Lese-Latenzen von 3, 4 und 5 Taktzyklen wird ein maximaler Datendurchsatz von 25,6&nbsp;GB/s bei 256-Bit-Anbindung erreicht. GDDR arbeitet wie der DDR-SDRAM mit einem Zweifach-[[Dynamic Random Access Memory#Prefetch|Prefetch]].</div></td>
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Denniss
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=254331224&oldid=prev
2A02:8389:2204:380:582D:788F:C88E:8EAC: /* GDDR7 */ hinzufügen bei gddr 7 der infos über die ersten gpus sowie den hersteller des speicherbausteins
2025-03-18T23:21:47Z
<p><span class="autocomment">GDDR7: </span> hinzufügen bei gddr 7 der infos über die ersten gpus sowie den hersteller des speicherbausteins</p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Nächstältere Version</td>
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 19. März 2025, 01:21 Uhr</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Folgende GDDR-Typen wurden bisher entwickelt:</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Folgende GDDR-Typen wurden bisher entwickelt:</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>=== (G)<del style="font-weight: bold; text-decoration: none;">DDR</del> ===</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>=== (G)<ins style="font-weight: bold; text-decoration: none;">DDR2</ins> ===</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>GDDR basiert auf Speicherbausteinen nach [[DDR-SDRAM]]-Standard. Bei dieser ersten Generation liegt die Spannung von [[Spannungsbezeichnung|VDD]] und [[Spannungsbezeichnung|VDDQ]] bei 2,5&nbsp;V. Mit Taktraten von 166 bis 400&nbsp;MHz und Lese-Latenzen von 3, 4 und 5 Taktzyklen wird ein maximaler Datendurchsatz von 25,6&nbsp;GB/s bei 256-Bit-Anbindung erreicht. GDDR arbeitet wie der DDR-SDRAM mit einem Zweifach-[[Dynamic Random Access Memory#Prefetch|Prefetch]].</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>GDDR basiert auf Speicherbausteinen nach [[DDR-SDRAM]]-Standard. Bei dieser ersten Generation liegt die Spannung von [[Spannungsbezeichnung|VDD]] und [[Spannungsbezeichnung|VDDQ]] bei 2,5&nbsp;V. Mit Taktraten von 166 bis 400&nbsp;MHz und Lese-Latenzen von 3, 4 und 5 Taktzyklen wird ein maximaler Datendurchsatz von 25,6&nbsp;GB/s bei 256-Bit-Anbindung erreicht. GDDR arbeitet wie der DDR-SDRAM mit einem Zweifach-[[Dynamic Random Access Memory#Prefetch|Prefetch]].</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR6X ===</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR6X ===</div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Wechselt von NRZ-PAM2- zu NRZ-PAM4-Modulation. Erstmalige Verwendung bei der Nvidia RTX 3080 und 3090.<ref>{{Internetquelle |autor= Ryan Smith |titel= Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA’s RTX 3090 |url= https://www.anandtech.com/show/15978/micron-spills-on-gddr6x-pam4-signaling-for-higher-rates-coming-to-nvidias-rtx-3090 |datum= 2020-08-20 |abruf = 2022-11-05}}</ref></div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Wechselt von NRZ-PAM2- zu NRZ-PAM4-Modulation. Erstmalige Verwendung bei der Nvidia RTX 3080 und 3090.<ref>{{Internetquelle |autor= Ryan Smith |titel= Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA’s RTX 3090 |url= https://www.anandtech.com/show/15978/micron-spills-on-gddr6x-pam4-signaling-for-higher-rates-coming-to-nvidias-rtx-3090 |datum= 2020-08-20 |abruf = 2022-11-05}}</ref><ins style="font-weight: bold; text-decoration: none;"> </ins></div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Informationen <del style="font-weight: bold; text-decoration: none;">zur</del> <del style="font-weight: bold; text-decoration: none;">kommende Generation</del> wurden im Oktober 2022 vorgestellt. <del style="font-weight: bold; text-decoration: none;">Ein</del> <del style="font-weight: bold; text-decoration: none;">Termin</del> <del style="font-weight: bold; text-decoration: none;">zur</del> <del style="font-weight: bold; text-decoration: none;">Markteinführung</del> <del style="font-weight: bold; text-decoration: none;">wurde</del> <del style="font-weight: bold; text-decoration: none;">zu</del> <del style="font-weight: bold; text-decoration: none;">diesem</del> <del style="font-weight: bold; text-decoration: none;">Zeitpunkt</del> <del style="font-weight: bold; text-decoration: none;">noch</del> <del style="font-weight: bold; text-decoration: none;">nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-</del>Grafikkarten<del style="font-weight: bold; text-decoration: none;">-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573</del>.<del style="font-weight: bold; text-decoration: none;">html</del> <del style="font-weight: bold; text-decoration: none;">heise.de:</del> <del style="font-weight: bold; text-decoration: none;">"Next</del>-<del style="font-weight: bold; text-decoration: none;">Gen</del>-<del style="font-weight: bold; text-decoration: none;">Grafikkarten:</del> GDDR7-<del style="font-weight: bold; text-decoration: none;">RAM</del> <del style="font-weight: bold; text-decoration: none;">drückt</del> <del style="font-weight: bold; text-decoration: none;">aufs Gaspedal "] vom 7. Oktober 2022</del>, <del style="font-weight: bold; text-decoration: none;">abgerufen</del> <del style="font-weight: bold; text-decoration: none;">am</del> <del style="font-weight: bold; text-decoration: none;">12.</del> <del style="font-weight: bold; text-decoration: none;">November</del> <del style="font-weight: bold; text-decoration: none;">2022</ref></del> <del style="font-weight: bold; text-decoration: none;">Markteinführung</del> <del style="font-weight: bold; text-decoration: none;">ist</del> <del style="font-weight: bold; text-decoration: none;">Anfang</del> <del style="font-weight: bold; text-decoration: none;">2025</del> <del style="font-weight: bold; text-decoration: none;">mit</del> <del style="font-weight: bold; text-decoration: none;">Nvidias</del> <del style="font-weight: bold; text-decoration: none;">RTX-5000er-</del> und <del style="font-weight: bold; text-decoration: none;">AMDs RX-9000er-Serie vorgesehen</del>.</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Informationen <ins style="font-weight: bold; text-decoration: none;">zu</ins> <ins style="font-weight: bold; text-decoration: none;">GDDR7</ins> wurden im Oktober 2022 vorgestellt. <ins style="font-weight: bold; text-decoration: none;">Erstmaligige</ins> <ins style="font-weight: bold; text-decoration: none;">Verwedung</ins> <ins style="font-weight: bold; text-decoration: none;">in</ins> <ins style="font-weight: bold; text-decoration: none;">den</ins> <ins style="font-weight: bold; text-decoration: none;">NVIDIA</ins> <ins style="font-weight: bold; text-decoration: none;">RTX</ins> <ins style="font-weight: bold; text-decoration: none;">5090</ins> <ins style="font-weight: bold; text-decoration: none;">und</ins> <ins style="font-weight: bold; text-decoration: none;">5080</ins> Grafikkarten. <ins style="font-weight: bold; text-decoration: none;">Desktop-GPUs</ins> <ins style="font-weight: bold; text-decoration: none;">der RTX</ins>-<ins style="font-weight: bold; text-decoration: none;">50</ins>-<ins style="font-weight: bold; text-decoration: none;">Serie verwenden</ins> GDDR7-<ins style="font-weight: bold; text-decoration: none;">Module</ins> <ins style="font-weight: bold; text-decoration: none;">von</ins> <ins style="font-weight: bold; text-decoration: none;">Samsung</ins>, <ins style="font-weight: bold; text-decoration: none;">da</ins> <ins style="font-weight: bold; text-decoration: none;">diese</ins> <ins style="font-weight: bold; text-decoration: none;">früher</ins> <ins style="font-weight: bold; text-decoration: none;">zur</ins> <ins style="font-weight: bold; text-decoration: none;">Validierung</ins> <ins style="font-weight: bold; text-decoration: none;">verfügbar</ins> <ins style="font-weight: bold; text-decoration: none;">waren</ins> <ins style="font-weight: bold; text-decoration: none;">als</ins> <ins style="font-weight: bold; text-decoration: none;">Module</ins> <ins style="font-weight: bold; text-decoration: none;">von</ins> <ins style="font-weight: bold; text-decoration: none;">SK</ins> <ins style="font-weight: bold; text-decoration: none;">Hynix</ins> und <ins style="font-weight: bold; text-decoration: none;">Micron</ins>.</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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2A02:8389:2204:380:582D:788F:C88E:8EAC
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=252071796&oldid=prev
87.157.6.26: /* GDDR7 */ Von RX-8000 auf RX-9000 geändert. Veröffentlichungsdatum geändert.
2025-01-09T08:40:05Z
<p><span class="autocomment">GDDR7: </span> Von RX-8000 auf RX-9000 geändert. Veröffentlichungsdatum geändert.</p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 9. Januar 2025, 10:40 Uhr</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Informationen zur kommende Generation wurden im Oktober 2022 vorgestellt. Ein Termin zur Markteinführung wurde zu diesem Zeitpunkt noch nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-Grafikkarten-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573.html heise.de: "Next-Gen-Grafikkarten: GDDR7-RAM drückt aufs Gaspedal "] vom 7. Oktober 2022, abgerufen am 12. November 2022</ref> Markteinführung ist <del style="font-weight: bold; text-decoration: none;">im</del> <del style="font-weight: bold; text-decoration: none;">Herbst 2024</del> mit Nvidias RTX-5000er- und AMDs RX-<del style="font-weight: bold; text-decoration: none;">8000er</del>-Serie vorgesehen.</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Informationen zur kommende Generation wurden im Oktober 2022 vorgestellt. Ein Termin zur Markteinführung wurde zu diesem Zeitpunkt noch nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-Grafikkarten-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573.html heise.de: "Next-Gen-Grafikkarten: GDDR7-RAM drückt aufs Gaspedal "] vom 7. Oktober 2022, abgerufen am 12. November 2022</ref> Markteinführung ist <ins style="font-weight: bold; text-decoration: none;">Anfang</ins> <ins style="font-weight: bold; text-decoration: none;">2025</ins> mit Nvidias RTX-5000er- und AMDs RX-<ins style="font-weight: bold; text-decoration: none;">9000er</ins>-Serie vorgesehen.</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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87.157.6.26
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=250376418&oldid=prev
MarcoMA8: /* GDDR5 */ Archivlink geprüft
2024-11-15T19:23:48Z
<p><span class="autocomment">GDDR5: </span> Archivlink geprüft</p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 15. November 2024, 21:23 Uhr</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR5 ===</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR5 ===</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>GDDR5-Chips gibt es mit einer Kapazität von 512 MBit bis 8 GBit. Bei Taktfrequenzen zwischen 1,8 und 4&nbsp;GHz ergeben sich Transferraten von 3,6<ref>{{Internetquelle |autor=<del style="font-weight: bold; text-decoration: none;"> </del>Anton Shilov |titel=<del style="font-weight: bold; text-decoration: none;"> </del>GDDR5 in Production, New Round of Graphics Cards War Imminent - X-bit labs<del style="font-weight: bold; text-decoration: none;"> |url= http://www.xbitlabs.com/news/graphics/display/20080510113121_GDDR5_in_Production_New_Round_of_Graphics_Cards_War_Imminent.html</del> |datum=<del style="font-weight: bold; text-decoration: none;"> </del>2015-04-02 |<del style="font-weight: bold; text-decoration: none;">abruf</del>=<del style="font-weight: bold; text-decoration: none;"> 2022-11-05</del> |archiv-url=<del style="font-weight: bold; text-decoration: none;"> </del>https://web.archive.org/web/20150402183559/http://www.xbitlabs.com/news/graphics/display/20080510113121_GDDR5_in_Production_New_Round_of_Graphics_Cards_War_Imminent.html |archiv-datum=<del style="font-weight: bold; text-decoration: none;"> </del>2015-04-02<del style="font-weight: bold; text-decoration: none;"> |offline= </del> |archiv-bot= 2022-11-<del style="font-weight: bold; text-decoration: none;">09 12:42:37 InternetArchiveBot </del>}}</ref> bis 8&nbsp;GT/s.<ref>{{Internetquelle |autor= Hassan Mujtaba |titel= SK Hynix Readies 8 GHz GDDR5 4 GB Memory Sticks For GPUs - Also Shipping Stacked Designs Featuring HBM |url= https://wccftech.com/sk-hynix-readies-8-ghz-gddr5-4-gb-memory-sticks-gpus-shipping-stacked-designs-featuring-hbm/ |werk= Wccftech |datum= 2014-11-17 |abruf = 2022-11-05}}</ref> Bei ×32-Chips ergibt das 14,4 bis 32&nbsp;GByte/s, bei Grafikprozessoren mit 256 Datenleitungen und 8x GDDR5-Chips zwischen 115,2 und 256&nbsp;GByte/s. Die erste Grafikkarte mit GDDR5 war die [[ATI-Radeon-HD-4000-Serie|ATI Radeon HD 4870]], die in den ersten Versionen über 512&nbsp;MByte GDDR5-Speicher (3,6&nbsp;GT/s und 115,2&nbsp;GByte/s) verfügte. Die Großserienfertigung begann im ersten Halbjahr 2008. [[Qimonda]] hat die ersten GDDR5-SDRAM-Chips in größeren Stückzahlen ausgeliefert, während Hynix die ersten Muster vorstellte.<ref>{{Internetquelle |autor=Christof Windeck|url=https://www.heise.de/newsticker/meldung/Hynix-GDDR5-Speicher-fuer-Grafikchips-ab-Mitte-2008-196049.html |titel=Hynix: GDDR5-Speicher für Grafikchips ab Mitte 2008 |hrsg=heise online |datum= |abruf=2008-02-08}}</ref><ref>Spezifikationen unter: <!-- ehemals http://www.qimonda.com/static/download/products/Qimonda_GDDR5_whitepaper.pdf-->{{Internetquelle |autor= |url=https://xdevs.com/doc/_Datasheets/RAM.DDR5/Qimonda_GDDR5_whitepaper.pdf |titel=Qimonda GDDR5 – White Paper |werk= |hrsg=Qimonda |datum=2007-08 |format=PDF |archiv-url= |archiv-datum= |abruf=2022-11-05}}</ref> Samsung hat GDDR5-Speicher mit reduzierter Versorgungsspannung von 1,35&nbsp;V angekündigt.<ref>{{Internetquelle |autor=Jan-Frederik Timm |url=https://www.computerbase.de/2009-02/gddr5-in-50-nm-von-samsung/ |titel=GDDR5 in 50 nm von Samsung |werk=ComputerBase |datum=2009-02-13 |abruf=2022-11-05}}</ref> [[Sony Computer Entertainment|Sony]] verwendet bei der [[PlayStation&nbsp;4]] als Systemarbeitsspeicher 8&nbsp;GByte GDDR5 mit 176&nbsp;GByte/s Bandbreite.<ref name="Specs">{{Webarchiv |url=http://www.scei.co.jp/corporate/release/pdf/130221a_e.pdf |text=''Sony Computer Entertainment Inc. Introduces Playstation®4.'' |format=PDF; 386&nbsp;kB |wayback=20130221044123}} SCEI.co.jp, 20. Februar 2013 (englisch) abgerufen am 21. Februar 2013.</ref> Samsung kündigte als erste Firma die Massenproduktion von 8-GBit-GDDR5-Speicherchips an.<ref>{{Internetquelle |autor=Samsung |url=http://global.samsungtomorrow.com/samsung-electronics-starts-mass-producing-industrys-first-8-gigabit-graphics-dram-gddr5/ |titel=Samsung Electronics Starts Mass Producing Industry’s First 8-Gigabit Graphics DRAM (GDDR5) |datum=2015-01-15 |sprache=en |abruf=2015-02-09}}</ref></div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>GDDR5-Chips gibt es mit einer Kapazität von 512 MBit bis 8 GBit. Bei Taktfrequenzen zwischen 1,8 und 4&nbsp;GHz ergeben sich Transferraten von 3,6<ref>{{Internetquelle |autor=Anton Shilov<ins style="font-weight: bold; text-decoration: none;"> |url=http://www.xbitlabs.com/news/graphics/display/20080510113121_GDDR5_in_Production_New_Round_of_Graphics_Cards_War_Imminent.html</ins> |titel=GDDR5 in Production, New Round of Graphics Cards War Imminent - X-bit labs |datum=2015-04-02 |<ins style="font-weight: bold; text-decoration: none;">offline</ins>= |archiv-url=https://web.archive.org/web/20150402183559/http://www.xbitlabs.com/news/graphics/display/20080510113121_GDDR5_in_Production_New_Round_of_Graphics_Cards_War_Imminent.html |archiv-datum=2015-04-02 |archiv-bot= <ins style="font-weight: bold; text-decoration: none;">|abruf=</ins>2022-11-<ins style="font-weight: bold; text-decoration: none;">05</ins>}}</ref> bis 8&nbsp;GT/s.<ref>{{Internetquelle |autor= Hassan Mujtaba |titel= SK Hynix Readies 8 GHz GDDR5 4 GB Memory Sticks For GPUs - Also Shipping Stacked Designs Featuring HBM |url= https://wccftech.com/sk-hynix-readies-8-ghz-gddr5-4-gb-memory-sticks-gpus-shipping-stacked-designs-featuring-hbm/ |werk= Wccftech |datum= 2014-11-17 |abruf = 2022-11-05}}</ref> Bei ×32-Chips ergibt das 14,4 bis 32&nbsp;GByte/s, bei Grafikprozessoren mit 256 Datenleitungen und 8x GDDR5-Chips zwischen 115,2 und 256&nbsp;GByte/s. Die erste Grafikkarte mit GDDR5 war die [[ATI-Radeon-HD-4000-Serie|ATI Radeon HD 4870]], die in den ersten Versionen über 512&nbsp;MByte GDDR5-Speicher (3,6&nbsp;GT/s und 115,2&nbsp;GByte/s) verfügte. Die Großserienfertigung begann im ersten Halbjahr 2008. [[Qimonda]] hat die ersten GDDR5-SDRAM-Chips in größeren Stückzahlen ausgeliefert, während Hynix die ersten Muster vorstellte.<ref>{{Internetquelle |autor=Christof Windeck|url=https://www.heise.de/newsticker/meldung/Hynix-GDDR5-Speicher-fuer-Grafikchips-ab-Mitte-2008-196049.html |titel=Hynix: GDDR5-Speicher für Grafikchips ab Mitte 2008 |hrsg=heise online |datum= |abruf=2008-02-08}}</ref><ref>Spezifikationen unter: <!-- ehemals http://www.qimonda.com/static/download/products/Qimonda_GDDR5_whitepaper.pdf-->{{Internetquelle |autor= |url=https://xdevs.com/doc/_Datasheets/RAM.DDR5/Qimonda_GDDR5_whitepaper.pdf |titel=Qimonda GDDR5 – White Paper |werk= |hrsg=Qimonda |datum=2007-08 |format=PDF |archiv-url= |archiv-datum= |abruf=2022-11-05}}</ref> Samsung hat GDDR5-Speicher mit reduzierter Versorgungsspannung von 1,35&nbsp;V angekündigt.<ref>{{Internetquelle |autor=Jan-Frederik Timm |url=https://www.computerbase.de/2009-02/gddr5-in-50-nm-von-samsung/ |titel=GDDR5 in 50 nm von Samsung |werk=ComputerBase |datum=2009-02-13 |abruf=2022-11-05}}</ref> [[Sony Computer Entertainment|Sony]] verwendet bei der [[PlayStation&nbsp;4]] als Systemarbeitsspeicher 8&nbsp;GByte GDDR5 mit 176&nbsp;GByte/s Bandbreite.<ref name="Specs">{{Webarchiv |url=http://www.scei.co.jp/corporate/release/pdf/130221a_e.pdf |text=''Sony Computer Entertainment Inc. Introduces Playstation®4.'' |format=PDF; 386&nbsp;kB |wayback=20130221044123}} SCEI.co.jp, 20. Februar 2013 (englisch) abgerufen am 21. Februar 2013.</ref> Samsung kündigte als erste Firma die Massenproduktion von 8-GBit-GDDR5-Speicherchips an.<ref>{{Internetquelle |autor=Samsung |url=http://global.samsungtomorrow.com/samsung-electronics-starts-mass-producing-industrys-first-8-gigabit-graphics-dram-gddr5/ |titel=Samsung Electronics Starts Mass Producing Industry’s First 8-Gigabit Graphics DRAM (GDDR5) |datum=2015-01-15 |sprache=en |abruf=2015-02-09}}</ref></div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR5X ===</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR5X ===</div></td>
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</table>
MarcoMA8
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=250047699&oldid=prev
84.58.217.95 am 4. November 2024 um 20:59 Uhr
2024-11-04T20:59:14Z
<p></p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Nächstältere Version</td>
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 4. November 2024, 22:59 Uhr</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[[Datei:ATI Radeon X1300 256MB - Hynix HY5DU561622CTP-5-5390.jpg|mini|hochkant=1.2|Hynix 256 MBit GDDR-SDRAM]]</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>[[Datei:ATI Radeon X1300 256MB - Hynix HY5DU561622CTP-5-5390.jpg|mini|hochkant=1.2|Hynix 256 MBit GDDR-SDRAM]]</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>'''Graphics Double Data Rate''', kurz '''GDDR''', ist spezieller [[DDR-SDRAM|DDR]]-Speicher mit höheren Transferraten.</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>'''Graphics Double Data Rate''', kurz '''GDDR''', ist spezieller [[DDR-SDRAM|DDR]]-Speicher mit höheren Transferraten.<ins style="font-weight: bold; text-decoration: none;"> Erreicht wird dies durch:</ins></div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Erreicht wird dies durch:</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* fest verlöteter Speicher (statt 1 oder 2 Steckkontakte),</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* fest verlöteter Speicher (statt 1 oder 2 Steckkontakte),</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* extrem kurze und direkte Signalwege direkt neben CPU oder Graphikchip (statt über CPU-Chip, [[CPU-Sockel]], [[Leiterplatte|PCB]]-1, RAM-Sockel, PCB-2 zum RAM-Baustein),</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* extrem kurze und direkte Signalwege direkt neben CPU oder Graphikchip (statt über CPU-Chip, [[CPU-Sockel]], [[Leiterplatte|PCB]]-1, RAM-Sockel, PCB-2 zum RAM-Baustein),</div></td>
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<td colspan="2" class="diff-lineno">Zeile 9:</td>
<td colspan="2" class="diff-lineno">Zeile 8:</td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* Optimierung des Chip-Designs auf hohe Taktraten teilweise bei Kompromissen für die Latenzzeiten sowie</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* Optimierung des Chip-Designs auf hohe Taktraten teilweise bei Kompromissen für die Latenzzeiten sowie</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* weitere Optimierungen wie 16-fach [[Dynamic Random Access Memory#Prefetch|Prefetching]] (kommt allerdings auch bei DDR-5-Speicher vor), QDR, PAM-4.</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>* weitere Optimierungen wie 16-fach [[Dynamic Random Access Memory#Prefetch|Prefetching]] (kommt allerdings auch bei DDR-5-Speicher vor), QDR, PAM-4.</div></td>
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<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Dadurch lässt sich die Datenübertragungsrate bei gleicher Busbreite gegenüber schnellem DDR-RAM etwa vervierfachen.<ref>Schnellster verfügbarer DDR-RAM vs. schnellster Grafikkartenspeicher: 2004: 0,266 vs. 0,95 GHz; 2005: 0,4 vs. 1,6 GHz; 2009: 1,3 vs. 3,4 GHz; 2013: 1,6 vs. 6 GHz; 2020: 4,8 vs. 19 GHz</ref></div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Dadurch lässt sich die Datenübertragungsrate bei gleicher Busbreite gegenüber schnellem DDR-RAM etwa vervierfachen.<ref>Schnellster verfügbarer DDR-RAM vs. schnellster Grafikkartenspeicher: 2004: 0,266 vs. 0,95 GHz; 2005: 0,4 vs. 1,6 GHz; 2009: 1,3 vs. 3,4 GHz; 2013: 1,6 vs. 6 GHz; 2020: 4,8 vs. 19 GHz</ref><ins style="font-weight: bold; text-decoration: none;"> Er wird vorwiegend in [[Grafikkarte]]n eingesetzt. Weiter Anwendung findet er in [[Spielkonsole]]n und Spezialprozessoren wie [[Intel Xeon Phi]], die hohe Bandbreiten benötigen und auf denen Speicher auf der Hauptplatine verlötet sein kann. Da GDDR-Speicher anders als DDR-Speicher angesteuert wird, muss dieser vom verwendeten Prozessor unterstützt werden.</ins></div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Er wird vorwiegend in [[Grafikkarte]]n eingesetzt. Weiter Anwendung findet er in</div></td>
<td colspan="2" class="diff-empty diff-side-added"></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>[[Spielkonsole]]n und Spezialprozessoren wie [[Intel Xeon Phi]], die hohe Bandbreiten benötigen und auf denen Speicher auf der Hauptplatine verlötet sein kann. Da GDDR-Speicher anders als DDR-Speicher angesteuert wird, muss dieser vom verwendeten Prozessor unterstützt werden.</div></td>
<td colspan="2" class="diff-empty diff-side-added"></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Typen ==</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Typen ==</div></td>
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<td colspan="2" class="diff-lineno">Zeile 19:</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Bus-<br /> breite</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Bus-<br /> breite</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Pre-<br /> fetch</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Pre-<br /> fetch</div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2" style="line-height:120%"| Betriebs-<br>spannung<br /> VDD/VDDQ</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2" style="line-height:120%"| Betriebs-<br>spannung<br /> VDD<ins style="font-weight: bold; text-decoration: none;"> </ins>/<ins style="font-weight: bold; text-decoration: none;"> </ins>VDDQ</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Gehäuse</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Gehäuse</div></td>
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<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| [[JEDEC Solid State Technology Association|JEDEC]]-Norm</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| [[JEDEC Solid State Technology Association|JEDEC]]-Norm</div></td>
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<td colspan="2" class="diff-lineno">Zeile 86:</td>
<td colspan="2" class="diff-lineno">Zeile 83:</td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>GDDR6 wird vom Speicherhersteller [[Micron Technology|Micron]] entwickelt. Wie Golem<ref>{{Internetquelle|autor=Marc Sauter|url=https://www.golem.de/news/videospeicher-microns-gddr6-fuer-grafikkarten-ist-fertig-1712-131829.html |titel=Microns GDDR6 für Grafikkarten ist fertig |werk=Golem |datum=2017-12-22 |abruf=2018-01-29}}</ref> am 22. Dezember 2017 berichtete, hat Micron die Entwicklung abgeschlossen, und verteilt erste Testmuster an die Hardwarehersteller. Die Serienfertigung läuft seit 2018.<ref>{{Internetquelle|autor=Marc Sauter|titel=Serienfertigung von GDDR6 wird mit Partnern abgestimmt |werk=Golem.de |datum=2018-09-29 |url=https://www.golem.de/news/videospeicher-serienfertigung-von-gddr6-wird-mit-partnern-abgestimmt-1705-127723.html |abruf=2019-02-04}}</ref></div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>GDDR6 wird vom Speicherhersteller [[Micron Technology|Micron]] entwickelt. Wie Golem<ref>{{Internetquelle|autor=Marc Sauter|url=https://www.golem.de/news/videospeicher-microns-gddr6-fuer-grafikkarten-ist-fertig-1712-131829.html |titel=Microns GDDR6 für Grafikkarten ist fertig |werk=Golem |datum=2017-12-22 |abruf=2018-01-29}}</ref> am 22. Dezember 2017 berichtete, hat Micron die Entwicklung abgeschlossen, und verteilt erste Testmuster an die Hardwarehersteller. Die Serienfertigung läuft seit 2018.<ref>{{Internetquelle|autor=Marc Sauter|titel=Serienfertigung von GDDR6 wird mit Partnern abgestimmt |werk=Golem.de |datum=2018-09-29 |url=https://www.golem.de/news/videospeicher-serienfertigung-von-gddr6-wird-mit-partnern-abgestimmt-1705-127723.html |abruf=2019-02-04}}</ref></div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Die GDDR6-Speichermodule verwenden 180 Pins anstatt 190 Pins bei GDDR5(X). Sie werden ebenfalls mit einer Spannung von 1,35&nbsp;V wie bei GDDR5X betrieben. Die Speicherbandbreite soll 16&nbsp;GBit/s betragen, wobei die Testmuster nur 14&nbsp;GBit/s erreichen.</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Die GDDR6-Speichermodule verwenden 180 Pins anstatt 190 Pins bei GDDR5(X). Sie werden ebenfalls mit einer Spannung von 1,35&nbsp;V wie bei GDDR5X betrieben. Die Speicherbandbreite soll 16&nbsp;GBit/s betragen, wobei die Testmuster nur 14&nbsp;GBit/s erreichen<ins style="font-weight: bold; text-decoration: none;">. Es arbeiten auch [[Samsung Electronics|Samsung]] und [[SK Hynix]] an GDDR6-Modulen. Die ersten breit verfügbaren Grafikkarten mit GDDR6 sind die im September 2018 veröffentlichten GeForce-RTX-Karten von Nvidia</ins>.</div></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Es arbeiten auch [[Samsung Electronics|Samsung]] und [[SK Hynix]] an GDDR6-Modulen. Die ersten breit verfügbaren Grafikkarten mit GDDR6 sind die im September 2018 veröffentlichten GeForce-RTX-Karten von Nvidia.</div></td>
<td colspan="2" class="diff-empty diff-side-added"></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR6X ===</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR6X ===</div></td>
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<td colspan="2" class="diff-lineno">Zeile 89:</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Informationen zur kommende Generation wurden im Oktober 2022 vorgestellt. Ein Termin zur Markteinführung wurde zu diesem Zeitpunkt noch nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-Grafikkarten-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573.html heise.de: "Next-Gen-Grafikkarten: GDDR7-RAM drückt aufs Gaspedal "] vom 7. Oktober 2022, abgerufen am 12. November 2022</ref></div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Informationen zur kommende Generation wurden im Oktober 2022 vorgestellt. Ein Termin zur Markteinführung wurde zu diesem Zeitpunkt noch nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-Grafikkarten-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573.html heise.de: "Next-Gen-Grafikkarten: GDDR7-RAM drückt aufs Gaspedal "] vom 7. Oktober 2022, abgerufen am 12. November 2022</ref><ins style="font-weight: bold; text-decoration: none;"> Markteinführung ist im Herbst 2024 mit Nvidias RTX-5000er- und AMDs RX-8000er-Serie vorgesehen.</ins></div></td>
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<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>Markteinführung ist im Herbst 2024 mit Nvidias RTX-5000er- und AMDs RX-8000er-Serie vorgesehen.</div></td>
<td colspan="2" class="diff-empty diff-side-added"></td>
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<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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</table>
84.58.217.95
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=248554391&oldid=prev
2003:C3:6735:D00:3541:BF00:AA75:C94E: /* Typen */
2024-09-12T23:37:43Z
<p><span class="autocomment">Typen</span></p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Nächstältere Version</td>
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 13. September 2024, 01:37 Uhr</td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| GDDR<del style="font-weight: bold; text-decoration: none;">-</del><br /> Gen.</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| GDDR<br /> Gen.</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! colspan="2"| Takt (GHz)</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! colspan="2"| Takt (GHz)</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Leitungs-<br />Code</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Leitungs-<br />Code</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 1</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 1</div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 0,16…0,4 || 0,32…0,8 || rowspan="6" | [[Double Data Rate|DDR]]-[[Non Return to Zero|NRZ]] || 1,3…3,2 || 10,4…25,6 || ||{{0|2×}}32 bit || {{0}}2-fach ||{{0}}2,5<del style="font-weight: bold; text-decoration: none;"> </del>V<del style="font-weight: bold; text-decoration: none;"> </del>/<del style="font-weight: bold; text-decoration: none;"> </del>2,5<del style="font-weight: bold; text-decoration: none;"> </del>V|| || JESD21C-2005, 3.11.5.2</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 0,16…0,4 || 0,32…0,8 || rowspan="6" | [[Double Data Rate|DDR]]-[[Non Return to Zero|NRZ]] || 1,3…3,2 || 10,4…25,6 || ||{{0|2×}}32 bit || {{0}}2-fach ||{{0}}2,5<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>/<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>2,5<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V|| || JESD21C-2005, 3.11.5.2</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 2</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 2</div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}0,4…0,5 || {{0}}0,8…1 || 3,2…4 || 25,6…32 || || {{0|2×}}32 bit || ||{{0}}2,5<del style="font-weight: bold; text-decoration: none;"> </del>V<del style="font-weight: bold; text-decoration: none;"> </del>/<del style="font-weight: bold; text-decoration: none;"> </del>1,8<del style="font-weight: bold; text-decoration: none;"> </del>V|| || JESD21C-2005, 3.11.5.6</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}0,4…0,5 || {{0}}0,8…1 || 3,2…4 || 25,6…32 || || {{0|2×}}32 bit || ||{{0}}2,5<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>/<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>1,8<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V|| || JESD21C-2005, 3.11.5.6</div></td>
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<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 3</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 3</div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}0,7…1,3 || {{0}}1,4…2,6 || 5,6…10 || {{0|,0}}45…83 || {{0|0}}67…125 || {{0|2×}}32 bit || {{0}}4-fach ||{{0}}1,8<del style="font-weight: bold; text-decoration: none;"> </del>V<del style="font-weight: bold; text-decoration: none;"> </del>/<del style="font-weight: bold; text-decoration: none;"> </del>1,8<del style="font-weight: bold; text-decoration: none;"> </del>V|| 170-Ball FBGA || JESD21C-2005, 3.11.5.7</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}0,7…1,3 || {{0}}1,4…2,6 || 5,6…10 || {{0|,0}}45…83 || {{0|0}}67…125 || {{0|2×}}32 bit || {{0}}4-fach ||{{0}}1,8<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>/<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>1,8<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V|| 170-Ball FBGA || JESD21C-2005, 3.11.5.7</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 4</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 4</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 5</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 5</div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}1,8…4 || {{0}}3,6…8 ||{{0|,}}14…32 || {{0|,}}115…256 || 173…384 || {{0|2×}}32 bit || {{0}}8-fach ||{{0}}1,5<del style="font-weight: bold; text-decoration: none;"> </del>V<del style="font-weight: bold; text-decoration: none;"> </del>/<del style="font-weight: bold; text-decoration: none;"> </del>1,5<del style="font-weight: bold; text-decoration: none;"> </del>V|| 170-Ball FBGA || JESD212C-2016</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}1,8…4 || {{0}}3,6…8 ||{{0|,}}14…32 || {{0|,}}115…256 || 173…384 || {{0|2×}}32 bit || {{0}}8-fach ||{{0}}1,5<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>/<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>1,5<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V|| 170-Ball FBGA || JESD212C-2016</div></td>
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<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 5X</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 5X</div></td>
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<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| {{0|0,0}}5…7 || {{0|0,}}10…14||{{0|,}}40…56 || {{0|,}}320…448 || 480…672 || {{0|2×}}32 bit || 16-fach || 1,35<del style="font-weight: bold; text-decoration: none;"> </del>V<del style="font-weight: bold; text-decoration: none;"> </del>/<del style="font-weight: bold; text-decoration: none;"> </del>1,35<del style="font-weight: bold; text-decoration: none;"> </del>V || 190-Ball FBGA || JESD232A-2016</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| {{0|0,0}}5…7 || {{0|0,}}10…14||{{0|,}}40…56 || {{0|,}}320…448 || 480…672 || {{0|2×}}32 bit || 16-fach || 1,35<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>/<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>1,35<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V || 190-Ball FBGA || JESD232A-2016</div></td>
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<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6</div></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}3,5…5 || {{0|0,}}14…20 || [[Quadruple Data Rate|QDR]]-NRZ || {{0|,}}56…80 || {{0|,}}448…640 || 672…960 || 2×16 bit || 16-fach || 1,35<del style="font-weight: bold; text-decoration: none;"> </del>V<del style="font-weight: bold; text-decoration: none;"> </del>/<del style="font-weight: bold; text-decoration: none;"> </del>1,35<del style="font-weight: bold; text-decoration: none;"> </del>V || 180-Ball FBGA || JESD250A-2017</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}3,5…5 || {{0|0,}}14…20 || [[Quadruple Data Rate|QDR]]-NRZ || {{0|,}}56…80 || {{0|,}}448…640 || 672…960 || 2×16 bit || 16-fach || 1,35<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>/<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>1,35<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V || 180-Ball FBGA || JESD250A-2017</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6X</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6X</div></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 4,75…5,6 || {{0}}9,5…11,2 || {{nowrap|QDR-[[Pulsamplitudenmodulation|PAM-4]]}} || {{0|,}}76…84 || {{0|,}}608…717 || 912…1008 || {{nowrap|2×16 bit}} || {{nowrap|16-fach}} || 1,35<del style="font-weight: bold; text-decoration: none;"> </del>V<del style="font-weight: bold; text-decoration: none;"> </del>/<del style="font-weight: bold; text-decoration: none;"> </del>1,35<del style="font-weight: bold; text-decoration: none;"> </del>V || {{nowrap|180-Ball FBGA}} || ''bisher kein JEDEC''</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 4,75…5,6 || {{0}}9,5…11,2 || {{nowrap|QDR-[[Pulsamplitudenmodulation|PAM-4]]}} || {{0|,}}76…84 || {{0|,}}608…717 || 912…1008 || {{nowrap|2×16 bit}} || {{nowrap|16-fach}} || 1,35<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>/<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>1,35<ins style="font-weight: bold; text-decoration: none;">&#8239;</ins>V || {{nowrap|180-Ball FBGA}} || ''bisher kein JEDEC''</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 7</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 7</div></td>
</tr>
</table>
2003:C3:6735:D00:3541:BF00:AA75:C94E
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=248554380&oldid=prev
2003:C3:6735:D00:3541:BF00:AA75:C94E: /* Typen */
2024-09-12T23:35:20Z
<p><span class="autocomment">Typen</span></p>
<table style="background-color: #fff; color: #202122;" data-mw="interface">
<col class="diff-marker" />
<col class="diff-content" />
<col class="diff-marker" />
<col class="diff-content" />
<tr class="diff-title" lang="de">
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Nächstältere Version</td>
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 13. September 2024, 01:35 Uhr</td>
</tr><tr>
<td colspan="2" class="diff-lineno">Zeile 22:</td>
<td colspan="2" class="diff-lineno">Zeile 22:</td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Bus-<br /> breite</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Bus-<br /> breite</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Pre-<br /> fetch</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Pre-<br /> fetch</div></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| <del style="font-weight: bold; text-decoration: none;">Betriebsspannung</del><br /> VDD/VDDQ</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2<ins style="font-weight: bold; text-decoration: none;">" style="line-height:120%</ins>"| <ins style="font-weight: bold; text-decoration: none;">Betriebs-<br>spannung</ins><br /> VDD/VDDQ</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Gehäuse</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| Gehäuse</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| [[JEDEC Solid State Technology Association|JEDEC]]-Norm</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! rowspan="2"| [[JEDEC Solid State Technology Association|JEDEC]]-Norm</div></td>
</tr>
<tr>
<td colspan="2" class="diff-lineno">Zeile 51:</td>
<td colspan="2" class="diff-lineno">Zeile 51:</td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6</div></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}3,<del style="font-weight: bold; text-decoration: none;">5…4,5</del> || {{0|0,}}<del style="font-weight: bold; text-decoration: none;">14…18</del> || [[Quadruple Data Rate|QDR]]-NRZ || {{0|,}}<del style="font-weight: bold; text-decoration: none;">56…72</del> || {{0|,}}<del style="font-weight: bold; text-decoration: none;">448…576</del> || <del style="font-weight: bold; text-decoration: none;">672…864</del> || 2×16 bit || 16-fach || 1,35 V / 1,35 V || 180-Ball FBGA || JESD250A-2017</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| {{0}}3,<ins style="font-weight: bold; text-decoration: none;">5…5</ins> || {{0|0,}}<ins style="font-weight: bold; text-decoration: none;">14…20</ins> || [[Quadruple Data Rate|QDR]]-NRZ || {{0|,}}<ins style="font-weight: bold; text-decoration: none;">56…80</ins> || {{0|,}}<ins style="font-weight: bold; text-decoration: none;">448…640</ins> || <ins style="font-weight: bold; text-decoration: none;">672…960</ins> || 2×16 bit || 16-fach || 1,35 V / 1,35 V || 180-Ball FBGA || JESD250A-2017</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6X</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6X</div></td>
</tr>
</table>
2003:C3:6735:D00:3541:BF00:AA75:C94E
https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=235874481&oldid=prev
79.245.165.147: /* Typen */
2023-07-27T20:25:01Z
<p><span class="autocomment">Typen</span></p>
<table style="background-color: #fff; color: #202122;" data-mw="interface">
<col class="diff-marker" />
<col class="diff-content" />
<col class="diff-marker" />
<col class="diff-content" />
<tr class="diff-title" lang="de">
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Nächstältere Version</td>
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 27. Juli 2023, 22:25 Uhr</td>
</tr><tr>
<td colspan="2" class="diff-lineno">Zeile 54:</td>
<td colspan="2" class="diff-lineno">Zeile 54:</td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6X</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>! 6X</div></td>
</tr>
<tr>
<td class="diff-marker" data-marker="−"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #ffe49c; vertical-align: top; white-space: pre-wrap;"><div>| 4,75…5,<del style="font-weight: bold; text-decoration: none;">25</del> || {{0}}9,<del style="font-weight: bold; text-decoration: none;">5…10</del>,<del style="font-weight: bold; text-decoration: none;">5</del> || {{nowrap|QDR-[[Pulsamplitudenmodulation|PAM-4]]}} || {{0|,}}76…84 || {{0|,}}<del style="font-weight: bold; text-decoration: none;">608…672</del> || 912…1008 || {{nowrap|2×16 bit}} || {{nowrap|16-fach}} || 1,35 V / 1,35 V || {{nowrap|180-Ball FBGA}} || ''bisher kein JEDEC''</div></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 4,75…5,<ins style="font-weight: bold; text-decoration: none;">6</ins> || {{0}}9,<ins style="font-weight: bold; text-decoration: none;">5…11</ins>,<ins style="font-weight: bold; text-decoration: none;">2</ins> || {{nowrap|QDR-[[Pulsamplitudenmodulation|PAM-4]]}} || {{0|,}}76…84 || {{0|,}}<ins style="font-weight: bold; text-decoration: none;">608…717</ins> || 912…1008 || {{nowrap|2×16 bit}} || {{nowrap|16-fach}} || 1,35 V / 1,35 V || {{nowrap|180-Ball FBGA}} || ''bisher kein JEDEC''</div></td>
</tr>
<tr>
<td colspan="2" class="diff-empty diff-side-deleted"></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>|-</div></td>
</tr>
<tr>
<td colspan="2" class="diff-empty diff-side-deleted"></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>! 7</div></td>
</tr>
<tr>
<td colspan="2" class="diff-empty diff-side-deleted"></td>
<td class="diff-marker" data-marker="+"></td>
<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>| 10,5 || 21 || PAM-3, 3 Bit<br>in 2 Takten || 126 || 1008 || 1512 || || || || || ''bisher kein JEDEC''<br>verfügbar in Cadence</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>|}</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
</tr>
<tr>
<td colspan="2" class="diff-lineno">Zeile 91:</td>
<td colspan="2" class="diff-lineno">Zeile 94:</td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR7 ===</div></td>
</tr>
<tr>
<td class="diff-marker"></td>
<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Informationen zur kommende Generation wurden im Oktober 2022 vorgestellt. Ein Termin zur Markteinführung wurde zu diesem Zeitpunkt noch nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-Grafikkarten-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573.html heise.de: "Next-Gen-Grafikkarten: GDDR7-RAM drückt aufs Gaspedal "] vom 7. Oktober 2022, abgerufen am 12. November 2022</ref></div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Informationen zur kommende Generation wurden im Oktober 2022 vorgestellt. Ein Termin zur Markteinführung wurde zu diesem Zeitpunkt noch nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-Grafikkarten-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573.html heise.de: "Next-Gen-Grafikkarten: GDDR7-RAM drückt aufs Gaspedal "] vom 7. Oktober 2022, abgerufen am 12. November 2022</ref></div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Markteinführung ist im Herbst 2024 mit Nvidias RTX-5000er- und AMDs RX-8000er-Serie vorgesehen.</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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https://de.wikipedia.org/w/index.php?title=Graphics_Double_Data_Rate&diff=227902003&oldid=prev
An-d: /* GDDR6X */ erste Infos zu GDDR7
2022-11-12T09:46:05Z
<p><span class="autocomment">GDDR6X: </span> erste Infos zu GDDR7</p>
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<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">← Nächstältere Version</td>
<td colspan="2" style="background-color: #fff; color: #202122; text-align: center;">Version vom 12. November 2022, 11:46 Uhr</td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>=== GDDR6X ===</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Wechselt von NRZ-PAM2- zu NRZ-PAM4-Modulation. Erstmalige Verwendung bei der Nvidia RTX 3080 und 3090.<ref>{{Internetquelle |autor= Ryan Smith |titel= Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA’s RTX 3090 |url= https://www.anandtech.com/show/15978/micron-spills-on-gddr6x-pam4-signaling-for-higher-rates-coming-to-nvidias-rtx-3090 |datum= 2020-08-20 |abruf = 2022-11-05}}</ref></div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>Wechselt von NRZ-PAM2- zu NRZ-PAM4-Modulation. Erstmalige Verwendung bei der Nvidia RTX 3080 und 3090.<ref>{{Internetquelle |autor= Ryan Smith |titel= Micron Spills on GDDR6X: PAM4 Signaling For Higher Rates, Coming to NVIDIA’s RTX 3090 |url= https://www.anandtech.com/show/15978/micron-spills-on-gddr6x-pam4-signaling-for-higher-rates-coming-to-nvidias-rtx-3090 |datum= 2020-08-20 |abruf = 2022-11-05}}</ref></div></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #a3d3ff; vertical-align: top; white-space: pre-wrap;"><div>Informationen zur kommende Generation wurden im Oktober 2022 vorgestellt. Ein Termin zur Markteinführung wurde zu diesem Zeitpunkt noch nicht genannt.<ref>[https://www.heise.de/news/Next-Gen-Grafikkarten-GDDR7-RAM-drueckt-aufs-Gaspedal-7287573.html heise.de: "Next-Gen-Grafikkarten: GDDR7-RAM drückt aufs Gaspedal "] vom 7. Oktober 2022, abgerufen am 12. November 2022</ref></div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><br /></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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<td style="background-color: #f8f9fa; color: #202122; font-size: 88%; border-style: solid; border-width: 1px 1px 1px 4px; border-radius: 0.33em; border-color: #eaecf0; vertical-align: top; white-space: pre-wrap;"><div>== Einzelnachweise ==</div></td>
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An-d